1. Field of the Invention
This invention relates to a pulse generation circuit used in an electronic circuit of a communication device such as a television receiver.
2. Description of the Related Art
FIG. 3 is a block diagram showing a pulse delay circuit. In operation, a pulse P1 input to an input terminal IN is supplied to a time constant circuit formed of a resistor R.sub.1 and a capacitor C.sub.1, via a buffer amplifier, so that a wave P2 which is delayed by time t.sub.1 with respect to the pulse P1 can be derived from a point a. The wave P2 is input to the next stage comparator (COMP) 23, sliced at a voltage level V.sub.th, and output as an output wave P3 from an output terminal OUT.
The waveforms P1-P3 thus obtained are shown in FIG. 4.
In the above described case, in order to generate the pulse P3 which is delayed by the time t.sub.1 with respect to the pulse P1, it is only necessary to determine the delay time t.sub.1 by the resistor R.sub.1 and the capacitor C.sub.1. However, in order to determine the pulse width of the pulse P3, it has been necessary to change the reference voltage V.sub.th to adjust the slice level of the wave P2 at the point a. The adjustment of the reference voltage V.sub.th must be effected each time the pulse delay time t.sub.1 is changed, thus causing a troublesome problem.